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CNRS learns to control nanoscale strain in CPUs, heads to Jedi training
We've always heard that Chewbacca and friends had the power to control nanoscale strain in processors in a galaxy far, far away, but we Earthlings are just now getting caught up. Researchers at the Centre d'élaboration de matériaux et d'études structurales (CEMES-CNRS) have reportedly patented a measurement device that will essentially "enable manufacturers to improve microprocessor production methods and optimize future computers." We'll warn you, the meat of this stuff is pretty technical, but the take home is this: the technique has a good chance at "optimizing strain modeling in transistors and enhancing their electrical efficiency," which is just what we need for more potent chips that demand less energy. And that's something even a layman can appreciate.
