HotChips
Latest
Intel opens up about its 'Knights Corner' supercomputer co-processor
HotChips is the show where chip makers come to show off their latest slices of silicon, and Knights Corner architect George Chrysos spilled the beans on Santa Clara's Xeon Phi co-processor. The unit's designed to bolt onto Xeon chips to help supercomputers crunch the numbers faster, by handling the "highly parallel" grunt work necessary for genetic and climate modeling, among other things. Chrysos has lofty goals for the hardware, hoping that it'll contribute to "scientific and technical progress," while we're just excited to see if it can help the company reclaim its Top 500 crown from IBM.
AMD bares all with Southern Islands GPU shots
AMD's been showing off its forthcoming wares at Hot Chips, and has taken the rare step of releasing detailed die shots for its Southern Islands GPUs. According to AnandTech, the company's shy about releasing such details, since it's aiming to beat rival NVIDIA to the punch by several months. Still, it's letting us humble members of the public peer inside the gallery we've got for you below, just as long as you pinkie-swear that you won't be selling the secrets to the boys in Santa Clara, okay? %Gallery-163817%
AMD teases next-gen Steamroller CPU, aims to Bulldoze the competition
AMD's Bulldozer CPUs remind us of Betamax (or MiniDisc), in that its superlative design hasn't been embraced thanks to one or two humbling limitations. However, Mark Papermaster, Sunnyvale's new CTO, took to the stage at Hot Chips to show how he's changing the situation with the third-generation Steamroller architecture. It's rowing back on the more experimental elements of the design, scrapping the single shared fetch-and-decode hardware in favor of dual-cores that should double the amount of instructions it can handle. It's hoping to make performance gains of 15 percent, clawing back some of Intel's lead, and is considering roping in the GPU to help with the heavy-hitting in future versions. The chips will be built at Globalfoundries 28-nanometer line and are hoped to be out at some point next year.
IBM pushing System z, Power7+ chips as high as 5.5GHz, mainframes get mightier
Ten-core, 2.4GHz Xeons? Pshaw. IBM is used to the kind of clock speeds and brute force power that lead to Europe-dominating supercomputers. Big Blue has no intentions of letting its guard down when it unveils its next generation processors at the upcoming Hot Chips conference: the company is teasing that the "zNext" chip at the heart of a future System z mainframe will ramp up to 5.5GHz -- that's faster than the still-speedy 5.2GHz z196 that has led IBM's pack since 2010. For those who don't need quite that big a sledgehammer, the technology veteran is hinting that its upcoming Power7+ processors will be up to 20 percent faster than the long-serving Power7, whose current 4.14GHz peak clock rate may seem quaint. We'll know just how much those extra cycles mean when IBM takes to the conference podium on August 29th, but it's safe to say that our databases and large-scale simulations won't know what hit them.
IBM and NCSA end their Blue Waters affair, go back to just being supercomputing friends
It seems that IBM and the National Center for Supercomputing Applications at the University of Illinois have hit a snag in their once fruitful relationship. After nearly four years of partnering for the Blue Waters petascale supercomputer, the NCSA's recently released a joint statement explaining that IBM's "terminated" its involvement with the project. If you'll recall, IBM was supplying its latest Power7 rigs to get all that data flowing, but the company's now decided that Ol' Blue will require more resources than initially anticipated. Apparently, there were talks to try and keep the spark alive, but since those fell through both have decided to return each others CDs and hoodies assets involved with the project (per contract terms): IBM gives back the money, while the NCSA returns any hardware supplied. The two plan on remaining in touch for future endeavours, and the NCSA doesn't appear to be too down either as it'll be consulting with the National Science Foundation to keep Blue Waters afloat. You'll find the official statement in the source link below, but we've included a video rendition of how we'd like to imagine it past the break. [Photo credit: kosheahan]
iPhone users may soon be putting on their Google Goggles
If iPhone owners are sometimes susceptible to a wee bit of Android envy, one reason might be Google Goggles. If you're not familiar with the Android app, Google Goggles uses pictures from your mobile phone to search the Web. Point your phone's camera at a Russian restaurant menu, and it is translated for you. Take aim at a landmark, and find out about the history of the place. Take a photo of a book cover, and you'll get a summary of the contents, bookstores that carry the title, and pricing. Or there's always the feature shown above -- the Nearby Places Overlay -- where you pan your phone's camera on a street and see labels describing every business. According to The Register, iPhone users won't have to wait very long to put on their Google Goggles. Google Staff Engineer David Petrou, speaking at the Hot Chips conference at Stanford University on Monday, mentioned in passing that the app could be released for iPhone by the end of 2010. That, of course, assumes that the app makes it through Apple's approval process -- that's never a sure thing, as the Google Voice team could share with their colleagues. [via CNET Web Crawler]
Microsoft details Vejle, the new Xbox 360's system-on-chip architecture
There aren't many unresolved mysteries with Microsoft's new console by this point -- apart from perhaps why it wasn't named the Stealthbox, like we were suggesting -- but one thing that hasn't been covered in excruciating detail yet is the new 360's splicing of the CPU and GPU into the same chip. Microsoft has remedied that today, informing us that the 45nm system-on-chip (codenamed Vejle; sorry, Valhalla fans) inside the refreshed Xbox makes do with a relatively minimal 372 million transistors, requiring only 40 percent of the power and less than 50 percent of the die space of its 2005 ancestor. A somewhat bemusing addition, noted by Ars, is the FSB Replacement sector you see in the image above. It's designed to induce lag in the system so that the Vejle chip doesn't run faster than the old stuff, something Microsoft couldn't allow to happen. Facepalm away, good people, facepalm away.
AMD's Bobcat and Bulldozer, 2011 flagship CPU cores, detailed today
One of these days AMD is gonna have to stop talking about its Atom-killing Bobcat and Xeon-ending Bulldozer cores and finally release them. But, until that happy moment arrives in 2011 (fingers crossed), we'll have to content ourselves with more presentation slides. First up, the Bobcat core is AMD's long overdue play for the netbook/ultrathin market. Pitched as having 90 percent of the performance of current-gen, K8-based mainstream chips, AMD's new mobility core will require "less than half the area and a fraction of the power" of its predecessors. That sounds like just the recipe to make the company relevant in laptop purchasing decisions again, while a touted ability for the core to run on less than one watt of power (by lowering operating frequencies and voltages, and therefore performance) could see it appear in even smaller form factors, such as MIDs. The Bobcat's now all set to become the centerpiece of the Ontario APU -- AMD's first Fusion chip, ahead of Llano -- which will be ramping up production late this year, in time for an early 2011 arrival. The Bulldozer also has a future in the Fusion line, but it's earliest role will be as a standalone CPU product for servers and high-end consumer markets. The crafty thing about its architecture is that every one Bulldozer module will be counted as two cores. This is because AMD has split its internal processing pipelines into two (while sharing as many internal components as possible), resulting in a sort of multicore-within-the-core arrangement. The way the company puts it, it's multithreading done right. Interlagos is the codename of the first Opteron chips to sport this new core, showing up at some point next year in a 16-core arrangement (that's 8 Bulldozers, if you're keeping score at home) and promising 50 percent better performance than the current Magny-Cours flagship. Big words, AMD. Now let's see you stick to a schedule for once.%Gallery-100088%
NCSA prepares for Blue Waters petascale supercomputer, and we've got the video to prove it
How often do you get to see an unboxing of this magnitude? Our buddy Bill at the NCSA (National Center for Supercomputing Applications at the University of Illinois) has been kind enough to hit us up with a video that shows the arrival and installation of the facility's new IBM 780 hardware at the National Petascale Computing Facility. This hardware will allow scientists to prep code in anticipation of the Blue Waters -- which, as previously reported, will be the largest publicly accessible supercomputer in the world when it goes online in 2011, thanks to its over 16,000 Power7 nodes. Video after the break.
IBM developing 10 petaflop supercomputer, Power7 to ship next year
The last we heard, IBM was hard at work on its Power7 processor. Now the company's announcing that the thirty-two core chip -- and copious amounts of eDRAM -- are at the heart of its newest supercomputing project. To be housed at the University of Illinois, IBM's Blue Waters will be the largest publicly accessible supercomputer in the world when it goes online in 2011, theoretically capable of achieving 16 petaflop speeds by connecting up to 16,384 Power7 nodes, although IBM said that initially the theoretical peak performance will likely be closer to 10 petaflops -- with more realistic sustained real-world performance near one petaflop. To keep things from overheating, a system was devised that includes water-cooling for the whole rack, including the processor itself. But why should government agencies and large corporations have all the fun? According to CNET, IBM plans to ship Power7 processors with commercial server products sometime next year.
IBM brings the ruckus -- and new Power7 processor
IBM likes its servers and supercomputers. A lot. After giving the Power6 plenty of self-congratulatory publicity, Big Blue is ready to move on to the 7th generation of Power, which is set to be announced at the Hot Chips conference this evening. With eight cores and up to four SMT4 threads running on each, the 45nm Power7 can perform 32 simultaneous tasks per chip. The designers have slapped in a whopping 32MB of eDRAM in each chip for improved latency, dual DDR3 memory controllers for a sustained 100GB per second bandwidth, and even error correcting code and memory mirroring for redundancy. Sounds like a major boon for research into the brains of mice and the history of dirty words, but we don't expect to hear much about this proc outside the server farm.
