Open-source OGD1 graphics card up for pre-order

Heads-up, open-source gurus -- your next play toy is officially ready to be pre-ordered. The OGD1 is a self-proclaimed "high-end FPGA prototyping kit and hardware engineering platform, equipped with the peripherals needed to develop and test computer graphics architectures." Essentially, it's designed to be used by students of FPGA programming, engineers hunting down a dev platform or hobbyists who just can't stop hacking stuff up. The board itself features twin dual-link DVI outputs, 256MB of RAM, PCI / PCI-X compatibility, a passive cooling system and a 128-bit memory bus. Of course, such a niche product doesn't come without a premium, so don't yell too loudly when reading that this one will cost you $1,500 to take home. Heck, it's only $1,400 if you're one of the first hundred to commit.

[Via Hack-A-Day]

[Paulmichael @ May 21st 2008 10:43PM]

Hope to see one of those at my college some day, because that'll be the only way I'll ever lay my hands on a video card THAT expensive...

[JLTate @ May 21st 2008 11:46PM]

Find the electrical engineering department's digital logic lab at your school. Chances are it has FPGA development boards in it. The difference between those educational boards and this one is that this board has 2 DVI outputs many DDR sdram chips and a PCI interface. That's pretty much it.

[JLTate @ May 21st 2008 11:52PM]

Oh yeah, and chances are if your college is worth its' salt, the CS department has a high-end nVidia Quadro that costs the same or more than this card.

Like this one, for example:
http://store.nvidia.com/DRHM/servlet/ControllerServlet?Action=DisplayProductDetailsPage&SiteID=nvidia&Locale=en_US&Env=BASE&productID=67049700

And yes, it might be able to play Crysis, but it'd rather do more interesting things like curing cancer.

[Kyle @ May 21st 2008 10:49PM]

I don't get it

[Dom @ May 21st 2008 10:52PM]

Can it play Crysis?

[cydonia @ May 21st 2008 11:35PM]

shut up

[JLTate @ May 21st 2008 11:48PM]

I, for one, welcome our can-it-play-Crysis-asker-killing overlords.

[Doug @ May 21st 2008 10:52PM]

You'll probably have better luck stripping a geforce4 apart and figuring out how to work with that... for 1,500 thats just too much for testing something You'll probably end up breaking..

[JLTate @ May 21st 2008 11:36PM]

Uhh... no. No, not really. The key here is that this has a blank FPGA underneath that heat sink, not a graphics accelerator.

Field Programmable Gate Arrays (FPGA) are basically chips that can be reprogrammed to be whatever you want them to be. Unlike that GeForce you mentioned, I could reprogram this chip to be whatever I wanted it to be. If I wanted it to suddenly be an x86 processor, all I'd have to do is write the VHDL or Verilog (hardware description languages) and download the compiled result to it. Get it?

[Dom @ May 21st 2008 10:53PM]

But can it run Crysis?

[dspalding @ May 21st 2008 11:05PM]

No, no it cannot

[octoberasian @ May 21st 2008 11:15PM]

A graphics card that can run Crysis decently at acceptable framerates will cost MUCH LESS than this card. Even dual 9800 GTX or GX2 or triple 9800 GTX is approximately less than this card alone-- but not by a superbly large margin.

And, to all those that like to ask redundant questions-- a graphics card that can run Crysis perfectly [on Vista] with all bells-and-whistles without loss of framerates does not exist... yet.

[ark_v2 @ May 22nd 2008 10:10AM]

Tu put it simple, this is the breadboard of graphics cards.

[go Murph @ May 21st 2008 11:30PM]

I could pick a small nit with the "of course", but thanks for the straight reporting.

[linuxamp @ May 21st 2008 11:38PM]

That heat sink is way too small for a "high-end" graphics card. It's not even using active cooling.

[JLTate @ May 21st 2008 11:55PM]

That's because it isn't a high-end graphics card. It's a research tool for the development of graphics cards.

The people that built your-high end graphics cards used many chips like that one to simulate and verify their designs before sending them off to China to have them fabricated.

[Howard @ May 21st 2008 11:57PM]

This board really doesn't make much sense. You can get development boards straight from Xilinx that have PCI-Express, DDR2 memory, and more powerful FPGAs for $1200. See here: http://www.xilinx.com/products/boards/virtex_boards_feature.htm

[JLTate @ May 22nd 2008 12:50AM]

Actually, believe it or not, but this board's 133MHz PCI-X gets 1 GB/s bandwidth while 1x PCIe 1.3 gets only 250 MB/s. If you consider that, and that this board has double the memory access width (128-bit DDR compared to the $1,199 board's 64-bit DDR2 SO-DIMM) this BOARD is actually pretty good.

Still, it's a friggin' POS Spartan. Though in their defense, that means you can use Webpack with this board.

But still... it's a friggin' POS Spartan.

[Bob @ May 22nd 2008 12:37AM]

Its a tad expensive for a graphics card, a very low end one, to just take home and play around with.

[ZekeSulastin @ May 22nd 2008 7:23AM]

... which is why it's an FPGA with graphics outputs, not a graphics card with an FPGA.

[Richard Lai @ May 22nd 2008 1:08AM]

Argh, this is the last thing I want to see right now. I've been writing a Handel-C code for our FPGA parallel image processing project in the last few days, been working up to midnight too. Hardware compiling just takes too much time.

FPGA is awesome for the fact that they can do a lot with a very low clock speed, due to the way you can parallelise the code for pipelining. But yes, it's also pricey.

[Roberto @ May 22nd 2008 7:52AM]

Pipelining is for highly sequential tasks. Multi-coring is for highly parallelized tasks.

[Richard Lai @ May 22nd 2008 7:59AM]

@Roberto: but grouping several stages into one parallel line is still pipelining, surely?

[Richard Lai @ May 22nd 2008 9:22AM]

@Roberto:

For example:

do
{
par
{
// Pipeline Stage 1 - Read Data
if(NotVisible != 0)
{
// prime the pipeline for the start of the next line
par
{
if( MousePtr->LeftButton )
RC100ReadSSRAM1((sy + 1)

[Richard Lai @ May 22nd 2008 9:29AM]

@Roberto: ok, I'll try again:

do{
par{
//Pipeline Stage 1 - Read Data
par{
RC100ReadSSRAM1(RAMAddress, ramcontent);
Pixel = ramcontentOutput = Pixel;
}
}while(1);

[Richard Lai @ May 22nd 2008 9:32AM]

Argh, I give up. Basically you can par{} several pipeline stages together, and each stage must also run in one clock cycle, so everything within are also in a par{}.

[bradwjensen @ May 22nd 2008 1:46AM]

This is (at least) a step in the right direction.

[Tombio @ May 22nd 2008 2:49AM]

But will it blend?

[loosely_coupled @ May 22nd 2008 2:57AM]

This is cool.. but whats up with no PCIexpress support? If this has extensive documentation and at least some basic firmware and drivers, it would be great as a learning / hacking tool.

[Joshua Walters @ May 22nd 2008 3:52PM]

-$100 for me!

Wait, I still cant afford it. Oh well. I dont have the mad skills required to use a card like this as it is.

At least I understand what a dev card is, unlike 75% of the other comments...