Lead researcher Behnam Kia explains that we are now "reaching the limits of physics in terms of transistor size." If you've ever listened to one of Intel's presentations, you'll notice that every new production process is getting harder to achieve. It's not that easy to crank out perfect 14-nanometer chips, and the company has delayed its 10-nanometer chips several times as a consequence. But Kia and the team believe that our obsession with size has obscured a key fact about how chips are currently built.
In the average PC chip, there are a series of circuits that use transistors, and each one is designed to perform a specific function. Imagine a factory where each circuit is an employee holding a calculator, and their job each day is to do a single equation over and over. The first chips had a handful of employees, but over time walls were knocked down, calculators were shrunk and employees lost weight. That means more folks are crammed into the same building, but each one is still just doing one bit of math when required.
That means that plenty of transistors are being left dormant, a quantity of wasted capacity in the system that we could harness. As Kia explains, the new chip design uses "chaos theory -- the system's own nonlinearity -- to enable transistor circuits to be programmed to perform different tasks." In our labored metaphor, your factory would stop employing more people, and instead train those already there to do multiple calculations. That way, you could do more work/math with the same number of transistors/employees, and apparently it's not that hard to implement.
The team at NC State has already fabricated the transistor circuits and programmed the platform to work as designed. The team thinks that these reconfigurable chips could be produced with almost the exact same tools as Intel currently uses on the production lines. If so, then it could offer up a way for CPU power to increase while we wait for the materials scientists to work out exactly how to produce workable chips below 5-nanometers.