University of Edinburgh crafts energy efficient FPGA supercomputer
Considering that ATI and NVIDIA don't seem to be making any substantial strides in reducing the amount of energy required to run their products, it's a tad surprising to hear of an entire supercomputer running a bit leaner than the competition. Hoping on the ever-growing green bandwagon, University of Edinburgh developers are at it again, this time crafting an uber-speedy machine that's reportedly "ten times more energy efficient and up to 300 times faster than its traditional equivalents." Based on field programmable gate arrays (FPGA), the chips are not only very difficult to program, but they can currently only be used "to perform very specific tasks." Of course, the creators are more interested in the extreme number crunching and power saving abilities than anything else, and while no commercial uses have been identified just yet, the machines could purportedly be used in fields such as "drug design, defense and seismology."[Via CNET]
















Reader Comments (Page 1 of 1)
Marshall Katz @ Mar 22nd 2007 5:17AM
I don't think I would ever hear the words "energy efficient FPGA" in the same sentence. FPGAs use power like it is going out of style normally.
CowboyGA @ Mar 22nd 2007 9:52AM
"Hoping on the ever-growing green bandwagon..."
I think you mean "hopping."
/nitpick
CowboyGA @ Mar 22nd 2007 9:52AM
"Hoping on the ever-growing green bandwagon..."
I think you mean "hopping."
/nitpick
Stephan @ Mar 22nd 2007 12:56PM
I work on FPGA's and let me tell there are some very energy efficient designs to be made go look at the XILINX Virtx 5 (this is a chip but good tech).
Anyhow the real problem here is that this is all a joke. You can not compare an FPGA to a CPU for several reasons. The biggest of which is that no one would design an FPGA to be able to handle the HUGE instruction set of a CPU. Now if you wanted to design an FPGA to work in conjuction with a CPU to speed up FEAR, WOW, or whatever game then it might be usefull. Actually some company is planning on doing this with the AMD architecure that shares the hypertransport bus.
Basically FPGAs can be extremely efficient because you can design them to work in parrell, becuase you are not confined by the x86 instruction set. For all those folding@home projects you could design an FPGA to do all the FFTs 100s of times faster than any CPU.
Ratz @ Mar 23rd 2007 7:54AM
Of course it's energy efficient, FPGAs are so bloody hard to program there's no point in turning the thing on. I really hope they've put a /lot/ of effort into the software, Cray XD1s have FPGAs attached to opterons in a rather nice topology, however it's still extraordinarily akward to code for them.
Graeme @ Mar 26th 2007 10:56AM
hi everyone,
I have to agree with most of the previous comments. FPGAs can ery difficuilt to program and i too would be worried about the tasks this device can actually implement.
"FPGAs use power like it is going out of style normally." as far as this goes have you ever compared it to the power consumption of a processor and all the memory components and busses need to make this operate?
"no one would design an FPGA to be able to handle the HUGE instruction set of a CPU" as far as this is concerned i am not really sure what you are talking about.. the instruction set is relatively small and a FPGA can be programmed to carry out far more complex tasks in a single instruction cycle than a processor ever could and with the use of run-time reconfiguration the FPGA can be made to operate in a similar way to a processor but implement custom instructions with the speed of hardware.
I agree that the power consumption of FPGA's makes them impractical for most applications but they do provide an interesting way of bridging the gap between "efficient" hardware and "flexible" software.
G