5nm

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  • Samsung Exynos 1080, the Korean company's first five-nanometer SoC, co-developed with Vivo.

    Samsung's Exynos 1080 is its first five-nanometer chip

    by 
    Daniel Cooper
    Daniel Cooper
    11.12.2020

    The Exynos 1080 is Samsung's first five-nanometer chip.

  • Apple A14 Bionic

    Apple on designing the A14 Bionic for the iPad Air and beyond

    by 
    Chris Velazco
    Chris Velazco
    10.12.2020

    The 2020 iPad Air is the first device announced by Apple to use the new A14 Bionic chipset. That silicon’s impact won't be limited to tablets, either -- it will almost certainly power the next generation of iPhones, which Apple will unveil on October 13th. In a conversation with Engadget, Apple VP of platform architecture Tim Millet and senior director of Mac and iPad Product Marketing Tom Boger shed some light on his team's approach to designing the A14, and what it means for the iPad Air and beyond.

  • Maxim Filipchuk

    ARM says its next processors will outperform Intel laptop chips

    by 
    Jon Fingas
    Jon Fingas
    08.16.2018

    ARM-based laptops have been pretty pokey to date, but you might have a different impression of them in a year or two. The company has offered a rare peek at the performance expectations for its future processor architectures, and the figures might make Intel nervous. While ARM already believes that its recently unveiled Cortex-A76 is competitive with Intel's 2.6GHz Core i5-7300U, it expects its 2019 "Deimos" and 2020 "Hercules" designs to clearly outperform that CPU. You would get "laptop-class" speed from a more efficient mobile chip, according to the company.

  • Reuters/Gleb Garanich

    IBM squeezes 30 billion transistors into a fingernail-sized chip

    by 
    Jon Fingas
    Jon Fingas
    06.05.2017

    Who said Moore's Law was dead? Certainly not IBM or its chip partners Globalfoundries and Samsung. The trio has developed a transistor manufacturing process that should pave the way for 5-nanometer chips. While the team etched the chip using the same extreme ultraviolet lithography (EUV) used for the breakthrough 7nm chip, it ditched the common FinFET (fin field effect) transistor design in favor of stacks of silicon nanosheets. The switch makes it possible to fine-tune individual circuits to maximize their performance as they're crammed into an incredibly small space. How small? At 5nm, the group says it can squeeze 30 billion transistors into a chip the size of a fingernail (see below) -- not bad when the 7nm chip held 20 billion transistors a couple of years ago.

  • Intel sets sights on 5nm chip; already gearing up fabs for 14nm production

    by 
    Sarah Silbert
    Sarah Silbert
    05.14.2012

    Ivy Bridge, Intel's first generation of chips to use the 22nm fabrication process, is hardly out of the gate, and yet talk has already turned to the company's next manufacturing technologies. According to Xbit Labs, which got its hands on some telltale slides, Paul Otellini et al. have the roadmap for 10nm, 7nm and 5nm processes locked down, and the company is preparing fabs in the states and Ireland to make chips using the 14nm fabrication method. Given that timeframe, Intel says 10nm chips will ship in 2015, with work on 5nm technology beginning that same year. While the slides in question look legit -- and that timeline matches previous reports -- we're not sure just when these mystery slides first made the rounds. Alas, we'll have a good few years to sort 5nm fact from fiction.

  • Silicon oxide forms solid state memory pathways just five nanometers wide

    by 
    Sean Hollister
    Sean Hollister
    09.03.2010

    Silicon oxide has long played the sidekick, insulating electronics from damage, but scientists at Rice University have just discovered the dielectric material itself could become a fantastic form of storage. Replacing the 10-nanometer-thick strips of graphite used in previous experiments with a layer of SiOx, graduate student Jun Yao discovered the latter material worked just as well, creating 5nm silicon nanowires that can be easily joined or broken (to form the bits and bytes of computer storage) when a voltage is temporarily applied. Considering that conventional computer memory pathways are still struggling to get to 20nm wide, this could make for quite the advance in storage, though we'll admit we've heard tell of one prototype 8nm NAND flash chip that uses nanowires already. Perhaps it's time for silicon oxide to have a turn in the limelight.