Ali Javey, Jeff Bokor, Chenming Hu, Moon Kim and H.S. Philip Wong crafted a transistor with a 1-nanometer gate. In theory this could shrink the weight and size of our already-thin electronics even more. For context, current silicon transistors have 20-nanometer gates. However, it's worth noting that graphene isn't the only material in use here. The UCB researchers also used molybdenum disulfide (MoS2) to achieve this result.
A problem with using anything but silicon for these ultra-small transistors is that with anything under 5nm in size, it gets harder to control the flow of electrons through the material, and the transistors can't be powered off. But since electrons are "heavier" when they're pushed through MoS2, smaller gate lengths can be used. Hence shrinking down to 1nm.
Now, it's important to note that while this is a huge discovery, it isn't precisely the first time for achievement the way that UCB says it is. Back in 2008, researchers from the University of Manchester used graphene to create a transistor 1nm across containing only a few carbon rings. And in 2006, Korean scientists used FinFET to make a transistor with a 3nm channel length.
So maybe relax, because it looks the reports of Moore's Law's demise have been slightly exaggerated or at least delayed.