3Dchips
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Intel unveils a groundbreaking way to make 3D chips
As it's getting more difficult to cram transistors next to each other in chips, and we near the end of Moore's Law, the only choice is to go vertical. Literally. That's the essence of 3D chip design, and it's the crux of a major Intel announcement this morning: It's developed the first 3D chip architecture that allows logic chips -- things like the CPU and graphics -- to be stacked together. This isn't just a far-flung research project, either. Intel claims we'll see the first products to use Foverus in the second half of next year.
HP eyes 2015 release for 3D integrated photonic chips
It's unavoidable -- mention HP and images of the TouchPad come floating to the surface. What most geek folk don't realize, however, is that the company recently famous for open sourcing webOS has been hard at work behind-the-scenes prepping for the next stage in computing: integrated photonics. The project, codenamed Corona, aims to create stackable 3D chips that communicate using inbuilt, microscopic lasers made from gallium. This new breed of CPUs is on track to combine "256 general purpose cores organized in 64 four-core clusters" created using a 16nm process for a performance boost of up to six times faster than traditional circuitry. Why do this? Well, the nature of optical communication would not only speed up the rate at which the various cores could relay data (a theoretical 20 terabytes per second), but would also drastically lower power requirements from a current 160 watts to 6.4 watts. Sounds like the future, indeed, but as with all things forward-facing, many of the necessary components are still being developed, so take that 2015 target date with a heady amount of sodium chloride.
IBM and 3M join forces to fab 3D microchips, create mini-silicon skyscraper valley
3D hype is fast wearing out its welcome, but there's at least one area of industry where the buzzed about term could usher in true innovation. Announced today as a joint research project, IBM and 3M will work towards the creation of a new breed of microprocessors. Unlike similar three-dimensional semiconductor efforts by Intel, the two newly partnered outfits plan to stack up to 100 layers of chips atop one another resulting in a microchip "brick." Under the agreement, IBM will contribute its expertise on packaging the new processors, while 3M will get to work developing an adhesive that can not only be applied in batches, but'll also allow for heat transfer without crippling logic circuitry. If the companies' boasts are to be believed, these powerhouse computing towers would cram memory and networking into a "computer chip 1,000 times faster than today's fastest microprocessor enabling more powerful smartphones, tablets, computers and gaming devices." That's a heady claim for a tech that doesn't yet exist, but is already taking swings at current faux 3D transistors. Official presser and video await you after the break.
IBM cools stacked silicon chips with water
Stacking silicon into what are called 3D chips is something IBM does as good as, if not better than, any other screener. Problem is, all those stacked circuits create a an exponential amount of heat, and traditional cooling methods don't scale. So what does IBM do? It comes up with integrated water channels about the size of a human hair that it's calling "interlayer cooling." According to IBM's Zurich Research Laboratory, this is the first tech of its kind. The 50 micron channels between individual chip layers are performing at 180 watt/cm2 per layer for a stack with a typical footprint of 4 cm2. In other words, it works.[Via TG Daily]
IBM pushing vertical stacking in next wave of supercomputers
Next-generation cooling technology isn't the only thing IBM's R&D crew is spending time with, as the chip giant has recently made plans to hit up "vertical stacking technology" in order to make the next wave of supercomputers really crank. Supposedly, "laying chips vertically -- as opposed to side by side -- reduces the distance data has to travel by 1,000 times, making the chips faster and more efficient." The new format will place chips directly atop one another and connect them with "tungsten filled pipes etched through the silicon," which will subsequently eliminate the need for wires and increase the speed at which data can flow. The questionably-dubbed "3D chips" will reportedly operate around 40-percent more efficiently than existing renditions, and considering that Intel is purportedly cooking up a similar agenda in their own labs, that "end of 2007" release date is quite likely to be accurate.
