microprocessor
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AMD readies quad-core Barcelona for August shipment
Those eager to lay down for the "industry's first" native x86 quad-core processor have but a few months left to wait, as AMD just announced that its quad-core Opteron's would begin shipping in August. Codenamed Barcelona, these CPUs will be launching in both "standard and low power versions," hit frequencies of up to 2GHz, and should provide performance increases of up to "70-percent" over existing Opterons in select applications. Additionally, those who can hold off a bit can look forward to even speedier chips in Q4 of this year, and an elusive "Special Edition" version should also be just around the bend. Per usual, no hints on what kind of premium you'll pay for this wee piece of silicon come August, but AMD did note that the processors wouldn't hit mainstream systems until September.
Intel CEO compares Silverthorne criticality with original Pentium
Intel's been throwing so many mobile processor codenames around in the past 12 months or so that we've resorted to hiring droids to constantly update pivot tables as chips are named and nixed from its ever-evolving roadmap. But being the weekend and all, it looks like we're stuck telling you about yet another presumably vital processor that's likely destined to hit cellphones, UMPCs, and other handheld computing platforms sometime in the not too distant future. According to an interview by Germany's FAZ, Intel's CEO compared the chip "to the original Pentium" in terms of importance to the company, and while Mr. Otellini didn't go into too much detail beyond that (can't blame him for keeping us curious), he did note that the firm hopes the 45nm CPU can infiltrate "10 to 20-percent of the mobile phone market."[Via TGDaily]
Intel talks up 3-Series chipset, Core 2 Extreme CPU for laptops
Shortly after revealing that a quad-core laptop chip was indeed in Intel's pipeline for 2008, the firm has decided to go public with even more laptop-based processor details over at Computex. Intel's executive vice president Sean Maloney had the honors of "unveiling" the 3-Series chipset family (formerly known as Bearlake), which will of course support DDR3 RAM, PCI Express 2.0, HDMI, and can come stocked with G33 / G35 Express integrated graphics. More importantly, the outfit formally introduced plans for an Intel Core 2 Extreme mobile processor that should be released in Q3 of this year. According to Mr. Maloney, the chip is targeted to be the company's "highest-performing mobile dual-core processor that still includes energy-saving power features for laptop designs." No word just yet on whether or not this CPU will cost more than the rest of your laptop components combined (but we wouldn't be surprised).[Via Laptoping]
OC Team Italy takes P4 to 8.18GHz
Nah, 8,180MHz can't hold a candle to 500GHz, but on the long road of overclocking Intel's Pentium 4 where there is an increasingly brief amount of time available to brag before being trumped, the zany Italians have crowned themselves champs once more. Not content with just hitting 8GHz with a "Cedar Mill" Pentium 4 631, OC Team Italy managed to push that very model an additional 179MHz by tweaking the FSB. The final results yielded a 173-percent overclock, and while this here setup may run stable for a continued period if placed at the depths of Antarctica, we can't imagine this being too feasible for the common man to replicate and actually utilize.
IBM and friends buddy up on 32-nanometer semiconductor
IBM has most certainly been on a tear of late when it comes to microprocessors, as this tidbit comes right on the heels of the firm's 4.7GHz POWER6 and self-assembling CPUs. Presumably thinking that two five heads are better than one, IBM has garnered support from Chartered, Samsung, Infineon, and Freescale to "develop and manufacture advanced 32-nanometer semiconductors." Of course, we're still not sure if the loose ends surrounding IBM's 65-nanometer team effort are all tied off, but onward and upward they go regardless. The collaborative agreements between the firms "include 32-nanometer bulk complementary metal oxide semiconductor (CMOS) process technologies and joint development of process design kits (PDKs) to support that technology," which basically means that the companies will attempt to work together at IBM's East Fishkill plant through 2010 to produce "high-performance, energy-efficient chips at 32nm." Unfortunately, we've no idea when these speedsters will be ready for the commercial world, but it's pretty safe to assume it won't be soon.[Via PCWorld, photo courtesy of Semiconductor-Technology]
IBM kicks out energy-efficient 4.7GHz POWER6 processor
Nah, it's no BlueGene L supercomputer, but IBM's latest dual-core microprocessor runs at a cool 4.7GHz while sporting 8MB of total cache per chip. The device reportedly runs "twice as fast" and packs four times the cache as the POWER5, and boasts a processor bandwidth of 300Gbps. Interestingly, the massive power increase doesn't seem to come with a boost in energy requirements, as IBM claims that the 65-nanometer POWER6 somehow ups its game while "using nearly the same amount of electricity" as its predecessor. The company plans on shoving the new darling into the System p570 server, and preliminary testing showed that all four of the "most widely used performance benchmarks for Unix servers" were shattered by its CPU. Unfortunately, there's no word on pricing nor availability just yet, but we're anticipating a bit of sticker shock when it does finally land.[Via LinuxDevices]
IBM begins production of 65nm Cell chip
It's no secret that IBM has had some bigger -- or, rather -- smaller and better plans in the works for its Cell microprocessor, but we've now got the word from Big Blue itself, with the company announcing that it has started production of an advanced version of the chip, using a 65 nanometer manufacturing process as opposed to the current 90nm. Apart from being physically smaller, the 65nm chip should also result in lower power consumption and reduced costs to manufacturers using the processor. While that would include IBM itself -- which uses Cell processors in some of its own BladeCenter servers -- the company's most famous customer is, of course, Sony, who use the chip in a not-so-little game console of theirs you may heard of. On that front, it's been reported that Sony does indeed plan to use this new chip in future versions of the PlayStation 3 to help cut manufacturing costs, although that doesn't necessarily mean we'll see a cut in the price of the console itself anytime soon.[Via Yahoo News/IDG]
Corowave laser technology to boost computing speeds
As we eagerly await the next minute jump in microprocessor speeds, computing tech start-up Lightfleet presents its new patented Corowave laser technology, which they hope will send your ol' Core 2 Duos straight to the grave. Lightfleet's developments in laser transmission promise to boost efficiency in multi-core machines while also reducing space and power consumption. Each microprocessor, outfitted with a transmitter and receptors, sends and receives data in simultaneous arrays by using lenses to spread lasers and mirrors to reflect and direct them; each processor selectively receiving messages using embedded addressing information. This form of expedited and synchronous optical processing is ideally targeted toward large-scale applications tackling complex calculations. It really sounds interesting and all, but we'll need to see some real-world proof before we get all hyped up, and with no real mention of pricing or performance metrics, there's no way to tell yet whether these supposed advancements will be worth the added investment.[Via Slashdot]Read - WSJRead - Lightfleet Corporation
IBM researchers unveil next-gen chip cooling technology
That clever Mr. Moore has his law proven correct on a regular basis, but we're not so sure he was accounting for the blistering byproduct a chip emits when speeds increase and efficiency doesn't. While CPUs and GPUs alike are kicking our kilowatt meters into overdrive, IBM researchers have been developing a newfangled method to cool processors down without the need for water. The technique, called "high thermal conductivity interface technology," allows a twofold improvement in heat removal over current methods -- a "highly viscous paste" is applied between the "chip cap and the hot chip" in order to decrease thermal resistance, while the "tree-like" architecture enables the goo to spread more uniformly and attain a thickness of "less than 10 micrometers." Although the concept seems to rely on carefully structured heatsinks and thinly applied thermal paste, the proposed results of this energy-free cooling contraption are indeed impressive, and if IBM's snazzy contrivance can honestly perform "ten times better" than current applications, maybe that leap in processor efficiency can just relocate to the back burner again after all.
